电气工程学报 ›› 2022, Vol. 17 ›› Issue (4): 122-132.doi: 10.11985/2022.04.013

• 特邀专栏:电化学储能系统安全管理与运维 • 上一篇    下一篇

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一种基于电感的改进双路交错并行架构均衡拓扑研究*

巫春玲1(), 刘智轩1(), 孟锦豪2, 徐先峰1, 郑克军1   

  1. 1.长安大学电子与控制工程学院 西安 710061
    2.四川大学电气工程学院 成都 610065
  • 收稿日期:2022-05-26 修回日期:2022-10-20 出版日期:2022-12-25 发布日期:2023-02-03
  • 通讯作者: 刘智轩,男,1998年生,硕士研究生。主要研究方向为储能锂电池管理系统。E-mail:2020132003@chd.edu.cn
  • 作者简介:巫春玲,女,1978年生,博士,副教授。主要研究方向为储能锂电池管理系统。E-mail:wuchl@chd.edu.cn
  • 基金资助:
    *国家重点研发计划(2021YFB2601300);陕西省重点研发计划(2022GY-193)

Research on an Improved Balanced Topology of Two-circuit Interleaved Parallel Architecture Based on Inductance

WU Chunling1(), LIU Zhixuan1(), MENG Jinhao2, XU Xianfeng1, ZHENG Kejun1   

  1. 1. School of Electronic and Control Engineering, Chang’an University, Xi’an 710061
    2. School of Electrical Engineering, Sichuan University, Chengdu 610065
  • Received:2022-05-26 Revised:2022-10-20 Online:2022-12-25 Published:2023-02-03
  • Contact: LIU Zhixuan, E-mail:2020132003@chd.edu.cn

摘要:

电池均衡已成为新能源汽车领域研究的热点,其中主动均衡是目前主要的研究方向。为了加快电池组的均衡速度,在双路交错并行架构式均衡拓扑的基础上,通过对均衡单元进行分档控制,使均衡电流一直保持在较高的水平。在Simulink中搭建了8节电池的均衡模型并对其进行仿真,将SOC初值分别设定为三种不同情况,试验结果表明,在第一种SOC初值条件下,改进前的均衡拓扑用时992.57 s完成均衡,改进后的均衡拓扑用时655.01 s完成均衡,均衡时间减少了34%;在第二种SOC初值条件下,改进前的均衡拓扑用时226.52 s完成均衡,改进后的均衡拓扑用时121.54 s完成均衡,均衡时间减少了46%;在第三种SOC初值条件下,改进前的均衡拓扑用时197.24 s完成均衡,改进后的均衡拓扑用时82.34 s完成均衡,均衡时间减少了58%;表明改进后的均衡拓扑可以有效提高均衡速度。

关键词: 主动均衡, 双路交错并行架构, 均衡电流, 均衡拓扑

Abstract:

Battery balancing has become a research hotspot in the field of new energy vehicles, in which active balancing is the main research direction. In order to speed up the equalization speed of the battery pack, based on the two-circuit interleaved parallel architecture for battery charge equalization, the equalization unit is equaled through grading control strategy, so as to keep the equalization current at a high level. The equalization model of 8 batteries is built and simulated in Simulink, and the initial SOC value is set to three different cases respectively. The experimental results show that under the first SOC initial value condition, the two-circuit interleaved parallel architecture for battery charge equalization takes 992.57 s to complete the equalization, while the improved equalization topology takes 655.01 s to complete the equalization, and the equalization time is reduced by 34%. Under the second SOC initial value condition, the two-circuit interleaved parallel architecture for battery charge equalization takes 226.52 s to complete the equalization, while the improved equalization topology takes 121.54 s to complete the equalization, and the equalization time is reduced by 46%. Under the third SOC initial value condition, the two-circuit interleaved parallel architecture for battery charge equalization takes 197.24 s to complete the equalization, while the improved equalization topology takes 82.34 s to complete the equalization, and the equalization time is reduced by 58%. It shows that the improved equalization topology can effectively improve the equalization speed.

Key words: Active equalization, two-circuit interleaved parallel architecture, equalization current, equalization topology

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